Method of fabricating wires for semiconductor devices

ABSTRACT

A method of forming wires for semiconductor devices can restrict increase of a wires resistance and a contact resistance of the semiconductor device by forming a plug without generating a void or keyhole, and includes a step of forming an insulation film on lower wires, a step of forming a contact hole on the lower wires by selectively etching the insulation film, a step of performing a precleaning process by using an argon sputtering method until the lower wires at the lower portion of the contact hole are etched at a predetermined depth, a step of forming a plug by depositing a tungsten in the contact hole, and a step of forming upper wires on the plug and the second insulation film. A re-deposition layer consisting of a material of the lower wires is formed at the inner walls of the contact hole in the precleaning process, and thus a whole process is simplified by omitting a step of forming a glue layer or adhesion layer. In addition, a step coverage of the re-deposition layer is superior at the lower portion of the contact hole, and thus the tungsten plug is formed without generating the void or keyhole. As a result, the wires resistance and the contact resistance of the semiconductor device are reduced.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to wires for semiconductor devices,and in particular to a method of fabricating wires for semiconductordevices suitable for a multi-layers wires constitution.

[0003] 2. Description of the Background Art

[0004] A conventional method of fabricating wires for semiconductordevices will now be explained with reference to FIGS. 1a to 1 h.

[0005] Referring to FIG. 1a, an oxide film is deposited on asemiconductor substrate 100 as a first insulation film 101. A titaniumnitride (TiN) film is deposited on the first insulation film 101 as aglue layer 102. A tungsten film (W) which is a first conductive layer103 is deposited on the glue layer 102.

[0006] Thereafter, a photoresist film pattern (not shown) is formed onthe first conductive layer 103. The first conductive layer 103 and theglue layer 102 are etched by using the photoresist film pattern as amask, and thus a first conductive layer pattern 103 a is formed on thefirst insulation film 101, as illustrated in FIG. 1b. The firstconductive pattern 103 a is hereinafter referred to as lower wires 103a. The glue layer 102 formed under the first conductive layer is alsopatterned, and thus becomes a glue layer pattern 102 a.

[0007] Referring to FIG. 1c, a silicon oxide film is formed at the upperportions of the lower wires 103 a and the first insulation film 101 a asecond insulation film. A photoresist film pattern 105 is formed at theupper portion of the second insulation film. The photoresist filmpattern 105 has an opening 106 at a predetermined portion on the lowerwires 103 a.

[0008] As illustrated in FIG. 1d, the second insulation film 104 isselectively etched by a reactive ion etching (RIE) by using thephotoresist film pattern 105 as a mask, thus forming a contact hole 107or via hole 107 at a predetermined portion on the lower wires 103 a.

[0009] As integration of the semiconductor devices is increased, thecontact hole or via hole 107 is decreased in diameter (D). Recently, thecontact hole is formed to have a diameter equal to or less than 0.2 μm.In addition, the improved integration of the semiconductor devices makesa height (h) of the contact hole or via hole 107 increased. As a result,an aspect ratio of the contact hole is increased, thus causing manyproblems in a process of fabricating wires in the semiconductor device.

[0010] The semiconductor substrate 100 illustrated in FIG. 1d istransferred to a device for depositing a metal film. As shown in FIG.1e, while the semiconductor substrate 100 is transferred, a naturaloxide film 108 is formed on an entire structure of the semiconductorsubstrate 100.

[0011] A precleaning process is carried out on the semiconductorsubstrate 100 as shown in FIG. 1e in order to remove the natural oxidefilm 108. As the precleaning process, there are used a wet etching ofdipping and rinsing the semiconductor substrate in an HF solution or asputtering method using an argon (AR) gas. When the AR sputtering methodis employed, process conditions are as follows.

[0012] Pressure in chamber: approximately 2 mTorr

[0013] Source power for generating a plasma: 400W(13.56 MHz)

[0014] Bias power: 270 W(400 KHz)

[0015] Process time: 10 seconds

[0016] Ar gas flowing amount: 10 cc/min

[0017] Thereafter, referring to FIG. 1f, a titanium (Ti) film or atitanium nitride (TiN) film is formed as an adhesion layer or a gluelayer 109 on the entire structure of the semiconductor substrate 100where the natural oxide film 108 is removed, namely at the upper portionof the second insulation film 104 and the inner wall and lower portionof the contact hole or via hole 107. A metal layer, especially atungsten is not deposited well on the silicon oxide film which composesthe second insulation film 103.

[0018] Accordingly, the adhesion layer or glue layer 109 is formed sothat the metal layer can be firmly adhered at the upper portion of thesecond insulation film 104 and in the contact hole 107, during a processfor forming upper wires, namely a process for depositing a metal layer.

[0019] Then, the tungsten film 110 is deposited on the adhesion layer orglue layer 109 by a chemical vapor deposition. The tungsten film 110 isdeposited at a sufficient thickness to fill up the contact hole 107, andthus is also formed on the adhesion layer 109 at the upper portion ofthe second insulation film 110.

[0020] As shown in FIG. 1g, a chemical mechanical polishing (CMP) or anetchback process is carried out on the tungsten film 110, therebyremoving the tungsten film deposited on the second insulation film 104.As a result, a tungsten plug 110 a is formed in the contact hole 107.

[0021] Referring to FIG. 1h, a metal film is formed as a conductivelayer on the entire structure in FIG. 1f, and patterned, thus formingthe upper wires 111.

[0022] In accordance with the conventional method of fabricating thewires for the semiconductor devices, the tungsten is not deposited wellon the insulation film, especially on the oxide film. Therefore, it isrequired to form the glue layer or adhesion layer on the secondinsulation film and at the inner walls of the contact hole beforeforming the tungsten plug.

[0023] In addition, after the blanket tungsten film is formed on theentire structure of the semiconductor substrate in order to form thetungsten plug, while the tungsten film at the upper portion of theinsulation film is removed by the etchback or CMP process, a number ofparticles are generated, and thus a fabricating rate of thesemiconductor device is reduced.

[0024] Besides, the etchback or CMP process is further included, ascompared with the process of selectively filling the tungsten in thecontact hole. Accordingly, the fabricating process of the semiconductordevice is more complicated.

[0025] As shown in FIG. 2, in case of a contact hole 200 having a highaspect ratio, a step coverage of the adhesion layer 201 is inferior atthe lower portion of the contact hole 200, and as a result the tungstenfilm is not deposited well thereon. After the tungsten plug 202 isformed, a void 203 is formed at the lower portion of the contact hole200, and thus a contact between the tungsten plug 202 and the lowerwires 204 is inferior, and a contact resistance is increased.

[0026] When the adhesion layer is formed thicker in order to improve itsstep coverage at the lower portion of the contact hole, an overhangtakes place at the edge portions of the entrance of the contact hole,and thus a keyhole is generated at the lower portion of the contact holeafter deposition of the tungsten film, thereby increasing a wiresresistance.

SUMMARY OF THE INVENTION

[0027] It is therefore a primary object of the present invention toprovide a method of fabricating wires for semiconductor devices having alow wires resistance and a low contact resistance.

[0028] It is another object of the present invention to provide a methodof fabricating wires for semiconductor devices which can reduce a wiresresistance and a contact resistance merely by changing conditions of aprecleaning process carried out when fabricating the wires for thesemiconductor devices.

[0029] It is still another object of the present invention to provide amethod of fabricating wires for semiconductor devices which can increasea fabricating rate of the semiconductor devices by omitting an etchbackprocess and preventing generation of particles, and which can improveproductivity by simplifying a fabricating process.

[0030] It is still another object of the present invention to provide amethod of fabricating wires for semiconductor devices which can simplifya fabricating process by omitting a process of forming an adhesion layerperformed before forming a plug.

[0031] In order to achieve the above-described objects of the presentinvention, there is provided a method of fabricating wires forsemiconductor devices including: a step of forming a first insulationfilm; a step of forming lower wires on the first insulation film; a stepof forming a second insulation film on the lower wires; a step offorming a contact hole on the lower wires by selectively etching thesecond insulation film; a step of performing a precleaning process byusing an argon (AR) sputtering method until the lower wires at the lowerportion of the contact hole are etched at a predetermined depth; a stepof selectively forming a conductive plug in the contact hole; and a stepof forming upper wires at the upper portions of the conductive plug andthe second insulation film, a re-deposition layer consisting of amaterial of the lower wires being formed at the inner walls of thecontact hole in the precleaning process.

[0032] In accordance with the method of fabricating the wires for thesemiconductor devices of the present invention, the precleaning processis a step of sputtering for approximately 25 seconds in the conditionsof a source power of 500 W, a bias power of 250 W, an argon gas flowingamount of 5 cc/min, and a pressure in a chamber of 0.5 mTorr.

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The present invention will become better understood withreference to the accompanying drawings which are given only by way ofillustration and thus are not limitative of the present invention,wherein:

[0034]FIGS. 1a through 1 h are vertical-sectional views sequentiallyillustrating a conventional process of fabricating wires forsemiconductor devices,

[0035]FIG. 2 is a vertical-sectional view illustrating a wires structurefor the semiconductor device fabricated by the conventional process;

[0036]FIGS. 3a through 3 g are vertical-sectional views sequentiallyillustrating a process of fabricating wires for semiconductor devicesaccording to the present invention;

[0037]FIG. 4 is a schematic view illustrating a principle of forming atungsten re-deposition layer at inner walls of a contact hole accordingto the present invention;

[0038]FIG. 5 is a vertical-sectional view illustrating a wires structurefor a semiconductor device in accordance with another embodiment of thepresent invention; and

[0039]FIG. 6 is a vertical-sectional view illustrating a wires structurein semiconductor devices in accordance with a third embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

[0040] A method of fabricating wires for semiconductor devices inaccordance with the present invention will now be described in referenceto the accompanying drawings.

[0041] Referring to FIG. 3a, a first insulation film 301 is formed on asemiconductor substrate 300. A titanium nitride (TiN) film is depositedon the first insulation film 301 as a glue layer 302. A tungsten film303 which is a conductive layer is formed on the glue layer 302. Then, aphotoresist film pattern 304 is formed on the tungsten film 303.

[0042] The tungsten film 303 and the TiN film 302 are etched by usingthe photoresist film pattern 304 as a mask, thus forming a tungsten filmpattern 303 a and the TIN film pattern 302 a, as shown in FIG. 3b. Thetungsten film pattern 303 a is operated as lower wires 303 a for thesemiconductor device, and a thickness thereof is approximately 5000 A.

[0043] Referring to FIG. 3c, a silicon oxide film is formed as a secondinsulation film 305 at the upper portions of the lower wires 303 a andthe first insulation film 301. A photoresist film pattern 306 is formedon the second insulation film 305.

[0044] As depicted in FIG. 3d, the second insulation film 305 isselectively etched by using the photoresist film pattern 306 as a mask,and thus a contact hole 307 or via hole 307 is formed at a predeterminedportion on the lower wires 303 a. A diameter, a radius and a depth ofthe via hole or contact hole 307 are indicated as ‘D’, ‘r’ and ‘h’,respectively.

[0045] Thereafter, a precleaning process is carried out on thesemiconductor substrate 300 in FIG. 3d. The precleaning process employsan argon sputtering method, and its process conditions are as follows.

[0046] Pressure in a sputtering chamber: 0.5 mTorr

[0047] Source power for generating a plasma: 550 W(13.56 MHz)

[0048] Bias power: 250 W(400 KHz)

[0049] Argon gas flowing amount: 5 cc/min

[0050] Sputtering time: 25 seconds

[0051] A natural oxide film and contaminants such as particles areremoved by the precleaning process.

[0052]FIG. 3e illustrates a structure on the semiconductor substrate 300after performing the precleaning process by using an aluminum sputteringmethod in the above conditions. That is, the upper portion of the lowerwires 303 a at the lower portion of the contact hole 304 is etched byapproximately 100 A to 600 A. In addition, the tungsten re-depositionlayer 308 of approximately 50 A is formed at the inner walls of thecontact hole 307. A principle of forming the tungsten re-depositionlayer 308 is as follows.

[0053] That is, as shown in FIG. 4, argon ions 401 are sputtered in thesputtering chamber, and thus bombards the lower wires 303 a. Tungstenions 402 at a portion of the lower wires 303 a impacted by the AR ionsjump out, and thus an etching is performed. As illustrated in FIG. 4,some tungsten ions 402 are adhered to the inner walls of the contacthole 307, thus forming a tungsten re-deposition layer 403. Here, thetungsten ions 402 are easily adhered to the lower inner walls of thecontact hole 307 because they are positioned nearer. The step coverageof the tungsten re-deposition layer at the lower portion of the contacthole 307 is superior, differently from the conventional method offorming the adhesion layer or glue layer, and thus the present inventionovercome the problems such as increase of a wires resistance and acontact resistance resulting from a void or keyhole generated during theplug formation.

[0054] Referring to FIG. 3f, a tungsten plug 309 is selectivelydeposited in the contact hole 307. As a method for selectivelydepositing the tungsten plug 309, a hydrogen reduction of WF₆ gas and alow pressure chemical vapor deposition (LPCVD) using a silane (SIH₄)reduction may be employed. That is, the tungsten re-deposition layer 308formed in the contact hole 307 is operated as a core for depositing thetungsten plug 309. Accordingly, the tungsten is selectively deposited inthe contact hole 307, and is not deposited at the upper portion of thesecond insulation film 305. It is because the second insulation film 305consists of an oxide film, especially a silicon oxide film, and thetungsten is not well deposited thereon. Therefore, differently from theconventional method, the etchback process is not required when thetungsten plug is formed.

[0055] Thereafter, as shown in FIG. 3g, a conductive layer is formed andpatterned at the upper portions of the second insulation film 305 andthe tungsten plug 309, thereby forming upper wires 310. It isadvantageous that the upper wires 310 consist of one of aluminum,tungsten and copper.

[0056] Referring to FIG. 5, a titanium (Ti), a titanium nitride (TiN)film or a tantalum nitride (TaN) film may be formed on the secondinsulation film 305 as an adhesion layer 311 before forming a metal filmsuch as a tungsten film, an aluminum film or a copper film which is theupper wires. Especially, in the case that the upper wires 310 consist ofthe copper film, it is preferable to form a diffusion barrier film 312at the upper portion of the upper wires 310. The diffusion barrier film312 advantageously consist of the titanium (Ti), the titanium nitride(TiN) film, the tantalum nitride (TaN) film or the tungsten nitride(WNx) film.

[0057] According to another embodiment of the present invention, asshown in FIG. 6, the lower wires 303 a may also consist of the copper(Cu). In this ease, it is preferable to form a diffusion barrier layer601 on the lower wires 303 a. A thickness of the diffusion barrier layer601 is set between 100 A and 600 A. That is, it is necessary to set thethickness of the diffusion barrier layer greater than a thickness to beetched in the precleaning process. When the copper is merely used as thelower wires, the copper ions may be adhered to the inner walls of thecontact hole, namely the sidewalls of the second insulation film due tothe sputtering of the AR ions during the precleaning process. As aresult, the copper ions are rapidly diffused to the second insulationfilm (especially in the case of an oxide film). Accordingly, thediffusion barrier layer is formed on the lower wires consisting of thecopper, and thus the re-deposition layer consisting of the material ofthe diffusion barrier layer is formed at the inner walls of the contacthole during the precleaning process. Thereafter, the copper ions aredeposited on the surface of the re-deposition layer, thereby preventingthe copper ions from being diffused into the second insulation film. Thediffusion barrier layer may consist of the tungsten nitride (WNx) film,the titanium nitride (TiN) film or the tantalum nitride (TaN) film.

[0058] According to a third embodiment of the present invention, thetungsten nitride film, the titanium nitride film and the tantalumnitride film may also be used as the material of the lower wires.

[0059] The operational principle of the present invention will now bedescribed. In the precleaning conditions of the present invention, amean free path of the etching gas ions (for example, the argon gas) isincreased, and a straightness of the ions is improved. That is, adifference between a source power and a bias power is increased from 130W(400 W-270 W) to 300 W(550 W-250 W), thereby improving the straightnessof the ions. In addition, a pressure in the chamber is reduced from 2mTorr to 0.5 mTorr and a flowing amount of the Argon gas is decreasedfrom 10 cc/min to 5 cc/min, thereby increasing the mean free path of theions. As the precleaning process is varied, the natural oxide film isremoved, the upper portion of the lower wires is etched at apredetermined degree, and the material of the etched lower wires isre-deposited to the inner walls of the contact hole. The re-depositionfilm consisting of the material of the lower wires serves as the gluelayer during the plug formation which is succeedingly performed.Consequently, the plug can be formed in the contact hole withoutgenerating the void or keyhole.

[0060] According to the present invention, the plug is formed in thecontact hole without generating the void or key hole, thus restrictingincrease of the wires resistance and contact resistance of thesemiconductor device.

[0061] According to the present invention, the etchback process isomitted in forming the plug in the contact hole, and thus the wholeprocess is simplified. Also, few particles are generated, and thus afabricating rate of the semiconductor devices is increased.

[0062] According to the present invention, the process for forming theglue layer or adhesion layer which is performed before forming the plugis omitted, thereby simplifying the whole process.

[0063] In addition, in accordance with the present invention, a contactarea between the plug in the contact hole and the lower wires isincreased, and thus the wires resistance of the semiconductor device isreduced. As shown in FIG. 3f, the lower wires 303 a is etched by h′, andthus a contact area between the plug and the lower wires is increased byan area of the inner walls of the contact hole corresponding to theetching depth. The increased contact area is equal to a value obtainedby multiplying “2 pr” (a length of a circumference of the contact hole,‘r’ is a radius of the contact hole) by “h′” (an etching depth of thelower wires).

[0064] As the present invention may be embodied in several forms withoutdeparting from the spirit or essential characteristics thereof, itshould also be understood that the above-described embodiments are notlimited by any of the details of the foregoing description, unlessotherwise specified, but rather should be construed broadly within itsspirit and scope as defined in the appended claims, and therefore allchanges and modifications that fall within the meets and bounds of theclaims, or equivalences of such meets and bounds are therefore intendedto be embraced by the appended claims.

What is claimed is:
 1. A method of fabricating wires for semiconductordevices comprising: a step for forming a first insulation film; a stepfor forming lower wires on the first insulation film; a step for forminga second insulation film on the lower wires; a step for forming acontact hole on the lower wires by selectively etching the secondinsulation film; a step for performing a precleaning process by using anargon (AR) sputtering method until the lower wires at the lower portionof the contact hole are etched at a predetermined depth; a step forselectively forming a conductive plug in the contact hole; and a stepfor forming upper wires at the upper portions of the conductive plug andthe second insulation film.
 2. The method according to claim 1, whereinthe step for performing the precleaning process is a step for sputteringfor approximately 25 seconds in the conditions of a source power of 500W, a bias power of 250 W, an argon gas flowing amount of 5 cc/min and apressure in a chamber of 0.5 mTorr.
 3. The method according to claim 1,wherein the step for performing the precleaning process is a step forforming a re-deposition layer consisting of a material of the lowerwires at the inner walls of the contact hole.
 4. The method according toclaim 1, wherein a material of the lower wires is one of a tungsten, atitanium, a titanium nitride film, a tantalum nitride film and atungsten nitride film.
 5. The method according to claim 1, furthercomprising a step for forming a diffusion barrier film after the stepfor forming the lower wires.
 6. The method according to claim 5, whereinthe material of the lower wires is copper.
 7. The method according toclaim 5, wherein the material of the diffusion barrier film is one of atitanium nitride film, a tantalum nitride film and a tungsten nitridefilm.
 8. The method according to claim 1, wherein a thickness of thelower wires is approximately 5000 A,
 9. The method according to claim 1,wherein a depth of the lower wires to be etched is approximately between100 A and 600 A.
 10. The method according to claim 3, wherein athickness of the re-deposition layer is approximately 50 A.
 11. Themethod according to claim 2, wherein the step for performing theprecleaning process is a step for forming the re-deposition layerconsisting of the material of the lower wires at the inner walls of thecontact hole.